GLM COMPLIANT SERIAL INTERFACE CIRCUITS
S2044/S2045
REFCLK Timing Table
Parameter
1
Symbol
Min.
Max.
Units
Comments
Frequency
26.5625 MHz
53.125 MHz
f
25.5598
53.119
26.5652
53.131
MHz
This is dependent on
the link rate and the
data path width.
Jitter 265.625 MBaud
531.25 MBaud
753
376
188
This is the maximum
total jitter allowed by
the Fiber Channel
standard.
ps
pk-pk
1062.5 MBaud
t
37.64
18.82
6
37.66
18.83
ns
ns
ns
ns
Period (f=26.5625 MHz)
Period (f=53.125 MHz)
REFCLK Low Time
p
t
p
t
low
t
6
REFCLK High Time
high
TX Setup to REFCLK
(GLM, HGLM)
t
t
s
s
h
2
6
ns
ns
TX Setup to REFCLK
(QGLM, EGLM)
TX Hold From REFCLK
t
3.3
0.5
0.5
ns
ns
ns
This applies to the
REFCLK input.
REFCLK Rise Time
REFCLK Fall Time
t
3.2
3.2
r
This applies to the
REFCLK input.
t
f
1. All parameters are for outputs driven into a 35pF lumped capacitive load.
Serial Data Timing Table (TLX, TLY; TX, TY)
Parameters
Description
Min
Max
Units
Conditions
T
RMS
Serial data output random
jitter (RMS)
—
20
ps
RMS, tested on a sample basis.
Measured with 1010 pattern.
J
T
Serial data output
deterministic jitter (p-p)
—
—
100
300
ps
ps
Peak-to-peak, tested on a sample basis.
Measured with IDLE pattern.
DJ
T
T
Serial data rise and fall
20% to 80%, tested on a sample basis.
SDR, SDF
Tested per Figure 10.
16
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
