S2020/S2021
HIPPI SOURCE/DESTINATION INTERFACE CIRCUITS
Figure 8. S2020 Source Device Timing
t
period
t
t
MPW MPW
50 MHZ
t
t
HMS
SUMS
MODE SELECT (2:0)
1. Control Inputs:
t
PDRC
SHORT_BURST
PACKET_AVAILABLE
BURST_AVAILABLE
DATA_AVAILABLE
CONNECT_REQUEST
RDCLK
t
t
HCI
SUCI
1
Control Inputs
t
t
SUDP HDP
DATA PARITY INPUTS
2. Status &Control Outputs:
CONNECT_ OUT
t
SCO
2
Status & Control Outputs
ACCEPT_REJECT
ERROR
SOURCE_NOT_DEST
t
t
RNRN
NREN
NRDEN
t
IFNRN
IFLD (SHBST = 1, PKTAV = 0
t
INPUT_PARITY_ERROR
DESTINATION_AVAILABLE
DATA_REQUEST
IPE
t
DAO
t
DRO
BANRN
t
BURST_AVAIL.
and DATAV = 1
S2020 Source Timing Table
Min
nsec
Typ
nsec
Max
nsec
Notes
3
—
5.55
7
20
—
—
—
11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
17
—
—
—
—
17
14
10
17
10
19
19
17
tPERIOD
3
tMPW
tSUMS
Relative to 50MHz INPUT
For Reference Only
0
tHMS
tPDRC
5
21
0
tSUCI
tHCI
tSUDP
tHDP
tSCO
14
0
—
—
—
—
—
—
—
—
4
tNREN
Relative to RDCLK Rising Edge
4
tIPE
4
tDAO
4
tDRO
4
tIFNRN
4
tRNRN
4
tBANRN
3. Guaranteed but not tested
16
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
