HIPPI
S2020/S2021 SOURCE DEVICE STATE MACHINES
Figure A-2. Destination Flow Diagram
D1610
D1600
Check for
INTERCONNECT = true
Power-up or system
master reset
CON SM: {IDLENAB}
H D/F SM: {DISCON 0-2}
MODE 0 THEN MODE 5
D1620
D1630
Inform SMT that
INTERCONNECT = true
Idle, wait for a source
connection request
CON SM: {IDLENAB}
H D/F SM: {DISCON 0-2}
CON SM: {IDLENAB}
H D/F SM: {DISCON 0-2}
D1640
D1650
Wait for
INTERCONNECT = true
Source is requesting a
connection
COM SM: {DISABLED}
H D/F SM: {DISCON 0-2}
CON SM: {REQCON}
H D/F SM: {IFIELD}
D1660
Inform SMT that
INTERCONNECT went false
D1680
D1670
Wait for destination ULP to
respond
Source aborted the
connection request
CON SM: {DISABLED}
H D/F SM: {DISCON 0-2}
CON SM: {REQCON}
H D/F SM: {IFIELD}
CON SM: {IDLENAB}
H D/F SM: {DISCON 0-2}
D1700
D1690
Destination rejected the
connection request
Inform ULP that connection
completed
CON SM: {REJ 0-7}
H D/F SM: {DISCON 0-2}
CON SM: {ACC 0-3}
H D/F SM: {DISCON 0-2}
D1720
D1710
The Source deasserted
REQUEST
Connected and waiting for
a packet
CON SM: {DISCON 0-3}
H D/F SM: {DISCON 0-2}
CON SM: {CONNECTED}
H D/F SM: {IDLE}
D1750
From
D1730
To
D1750
To
D1740
From
D1750
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