Revision J – April 7, 2006
S2004 – Quad Serial Backplane Device
Data Sheet
Figure 9. Channel Lock Synchronization Timing
(Internal)
RESYNC A
....
....
....
....
(Internal)
RESYNC B
(Internal)
RESYNC C
(Internal)
RESYNC D
FIFO Deskewing
FIFO Deskewed
(internal)
deskewed RESYNC A
....
....
....
....
....
(internal)
deskewed RESYNC B
(internal)
deskewed RESYNC C
(internal)
deskewed RESYNC D
(internal)
CHANNEL LOCK
A,B,C,D
*Note 1
ERRA
EOFA
0
1
1
0
1
0
1
....
....
....
KFLAGA
RX data out
0
0
BC
BC
BC
BC
Valid
Data
Valid
Data
BC
BC
BC
BC
....
(K28.5) (K28.5) (K28.5) (K28.5)
1. The first three K28.5's will be reported as “K28.5” (011), subsequent K28.5 will be reported as “Resync” or “channel lock detected.” See
Table 7.
16
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