QT2022/32 - Data Sheet: DS3051
1. Register value ignored for QT2022, or QT2032 in LAN mode.
Memory BIST Mode Register 0
1.C100h
Memory BIST Control Register 1
Memory BIST Control Register
1.C102h
Bit
1.C101h
0
1
Done
Upper Mode Register Bit 16 (RW)
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Run Memory BIST 0 (RW)
Run Memory BIST 1 (RW)
Run Memory BIST 2 (RW)
Run Memory BIST 3 (RW)
Run Memory BIST 4 (RW)
Corrupt Memory BIST 0 (RW)
Corrupt Memory BIST 1 (RW)
Corrupt Memory BIST 2 (RW)
Corrupt Memory BIST 3 (RW)
Corrupt Memory BIST 4 (RW)
BIST Enable 0 (RW)
Control Select
Algorithm Select
2:5
6
Pause
7
Error
8
Debug Mode
Pattern
12:9
BIST Enable 1 (RW)
BIST Enable 2 (RW)
14:13
15
Port
BIST Enable 3 (RW)
BIST Enable 4 (RW)
Upper Mode Register
Reserved, RO
Memory BIST
Debug
Register 0
1.C103h
Memory BIST
Memory BIST
Debug
Register 2
1.C105h
Memory BIST
Memory BIST
Debug
Register 4
1.C107h
Debug
Register 1
1.C104h
Debug
Register 3
1.C106h
Bit
7:0
Data [15:0], RO
Data [31:16], RO
Data [47:32], RO
Data [63:48], RO
Data [71:64], RO
Reserved, RO
15:8
Revision 5.11
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AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
