QT2022/32 - Data Sheet: DS3051
RX_ALARM Control
TX_ALARM Control
reg 36865
Bit
reg 36864
reg 1.9000h
reg 1.9001h
LEGACY=1
LEGACY=0
LEGACY=1
LEGACY=0
0
1
2
PHY_XS receive local fault enable, RW
1 = enabled, default
PHY_XS transmit local fault enable, RW
1 = enabled, default
rx_flag enable
0 = disabled, default
tx_flag enable
0 = disabled, default
PCS receive code violation enable
0 =disabled, default
PCS buffer over/underflow error enable
0 = disabled, default
See Note 1
3
4
5
PCS receive local fault enable
1 = enabled, default
PCS transmit local fault enable
1 = enabled, default
PMA/PMD receive local fault enable
1 = enabled, default
PMA/PMD transmit local fault enable
1 = enabled, default
Reserved, RO
Receive Optical Power fault
enable
Transmitter loss of lock enable
0 = disabled, default
1 = enabled, default
6
7
8
9
Receive buffer over/underflow error enable
0 = disabled, default
Transmitter Fault enable
1 = enabled, default
Transmitter Fault enable
0 = disabled, default
See Note 1
WIS Alarm Interrupt Enable (RW)
0 = disabled, default
See Note 2
Reserved, RO
Laser Output Power Fault
enable
1 = enabled, default
WIS Extended Alarm Interrupt Enable (RW)
0 = disabled, default
Reserved, RO
Reserved, RO
Laser Temperature Fault
enable
1 = enabled, default
See Note 2
WAN receive local fault
1=enabled, default
0 = disabled
Laser Bias Current Fault
enable
1 = enabled, default
See Note 2
10
Reserved, RO
Reserved, RO
PHY_XS code violation error enable
0 = disabled, default
15:11
Reserved, RO
Reserved, RO
Reserved, RO
Reserved, RO
Note 1: When LANMODE=1, this bit enables alarms on PHY_XS buffer over/under-flow. When LANMODE=0, this bit enables alarms on WIS buffer over/under-flow.
Note 2:This bit has no effect and is zero-valued (read-only) when LANMODE=1.
124
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