Revision 1.23 - Sept 21, 2006
PowerPC 440SPe Embedded Processor
Preliminary Data Sheet
Table 4. Signals Listed by Ball Assignment (Sheet 5 of 7)
Ball
Signal name
Ball
Signal name
Ball
Signal name
Ball
Signal name
PxV
U01
GND
V01
PCIX0AD22
W01 PCIX0Par
Y01
DD
U02
U03
U04
U05
U06
PCIX0INTA
PCIX0BE3
VDD
V02
V03
V04
V05
V06
PCIX0AD21
PCIX0AD20
PCIX0AD19
PCIX0AD18
PCIX0AD13
W02 PCIX0BE2
W03 PCIX0AD16
W04 PCIX0AD17
W05 PCIX0AD12
W06 PCIX0AD8
Y02
Y03
Y04
Y05
Y06
PCIX0BE1
PCIX0BE0
GND
PCIX0IDSel
PCIX0AD23
PCIX0AD7
PCIX0AD2
PxV
DD
U07
GND
V07
PCIX0AD9
W07 PCIX0AD4
Y07
U08
U09
U10
PCIX0AD61
VDD
V08
V09
V10
PCIX0AD3
GND
W08 PCIX0AD53
W09 PCIX0AD60
W10 PCIX0AD34
Y08
Y09
Y10
PCIX0VRef0
PCIX0AD49
GND
PSRO1
VDD
PxV
DD
U11
U12
U13
V11
V12
V13
PCIE0_RX0
GND
W11 PCIE0_RX0
W12 PCIE0_RX2
W13 PCIE0AVREG
Y11
Y12
Y13
PCIE0_TX0
PCIE0_RX2
GND
PxV
DD
PxV
DD
PCIE0AV25
SV
DD
SV
DD
U14
U15
U16
V14
V15
V16
PCIE0_RX6
GND
W14 PCIE0_RX6
W15 PCIE0_RX7
W16 PCIE0_RX7
Y14
Y15
Y16
GND
PCIE0_TX6
PCIE0_TX7
SV
DD
MemVRef1
U17
U18
U19
GND
V17
V18
V19
VDD
W17 BankSel3
W18 MemVRef0
W19 MemODT3
Y17
Y18
Y19
GND
VDD
GND
BankSel1
BankSel2
MemData08
MemData10
SV
DD
U20
GND
V20
DM1
W20 MemODT2
Y20
U21
U22
U23
U24
U25
DQS1
V21
V22
V23
V24
V25
MemData12
MemData13
MemData18
MemData19
DM2
W21 MemODT0
W22 MemData15
W23 DQS2
Y21
Y22
Y23
Y24
Y25
ClkEn0
SCANOUT07
VDD
MemODT1
GND
MemData16
SCANOUT00
W24 DQS2
MemData20
MemData22
W25 MemData17
SV
DD
U26
GND
V26
MemData21
W26 MemData23
Y26
46
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
