Revision 1.26 – October 15, 2007
440EPx – PPC440EPx Embedded Processor
I/O Specifications
Preliminary Data Sheet
Table 19. Peripheral Interface Clock Timings (Sheet 1 of 3)
Parameter
PCIClk frequency (asynchronous mode)
PCIClk period (asynchronous mode)
Min
–
Max
Units
MHz
ns
Notes
66.66
15
–
PCIClk high time
40% of nominal period
60% of nominal period
ns
PCIClk low time
40% of nominal period
60% of nominal period
ns
GMCMDClk frequency
GMCMDClk period
–
2.5
MHz
ns
400
–
GMCMDClk high time
GMCMDClk low time
GMCTxClk frequency MII
GMCTxClk period MII
GMCTxClk high time
GMCTxClk low time
160
–
ns
160
–
ns
2.5
25
MHz
ns
40
400
35% of nominal period
–
ns
35% of nominal period
–
ns
GMCRxClk frequency MII
GMCRxClk period MII
GMCRxClk high time
GMCRxClk low time
2.5
25
MHz
ns
40
400
35% of nominal period
–
ns
35% of nominal period
–
ns
GMCRefClk frequency
GMCRefClk period
–
125
MHz
MHz
ns
8
–
GMCRefClk high time
GMCRefClk low time
GMCRefClk Edge Stability (cycle-to-cycle jitter)
GMCRefClk Slew Rate
40% of nominal period
60% of nominal period
2
2
2
2
40% of nominal period
60% of nominal period
ns
–
2
+0.15
–
ns
V/ns
76
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
