Revision 1.21 – June 22, 2012
PPC440GX Embedded Processor
Clocking Specifications
Data Sheet
Table 11. Clocking Specifications
Symbol
Parameter
Minimum
Maximum
Units
Notes
SysClk Input
FC
Frequency
Period
33.33
83.33
30
MHz
ns
TC
12
TCS
TCH
TCL
Edge stability (cycle-to-cycle jitter)
–
±0.15
ns
High time
Low time
40% of nominal period
40% of nominal period
60% of nominal period
60% of nominal period
ns
ns
Note: Input slew rate ≥ 1V/ns
PLL VCO
FC
TC
Frequency
Period
600
1334
1.66
MHz
ns
0.75
Processor Clock (CPU Clock)
FC
TC
Frequency
Period
333
1.5
667
3
MHz
ns
1
MemClkOut and PLB
FC
TC
Frequency—533, 667 MHz
Period—533, 667 MHz
High time
100
166.66
10
MHz
ns
6
TCH
45% of nominal period
55% of nominal period
ns
OPB Clock
FC
Frequency
Period
66.66
12
83.33
15
MHz
ns
2
2
TC
MAL Clock
FC
Frequency
Period
83.33
10
100
12
MHz
ns
3
3
TC
Notes:
1. The maximum supported processor clock frequency for any part is specified in the part number (see “Ordering and PVR Information”
on page 5).
2. In order to support 1Gbps Ethernet data rate, the minimum OPB clock frequency is 66.66Mhz. If the Ethernet application is limited to
100Mbps, the minimum OPB clock frequency is 33.33Mhz.
3. In order to support 1Gbps Ethernet data rate, the minimum MAL clock frequency is 83.33Mhz. If the Ethernet application is limited to
100Mbps, the minimum MAL clock frequency is 33.33Mhz
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