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PPC440EP-3JC533C 参数 Datasheet PDF下载

PPC440EP-3JC533C图片预览
型号: PPC440EP-3JC533C
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 533MHz, CMOS, PBGA456, 35 X 35 MM, ROHS COMPLIANT, PLASTIC, BGA-456]
分类和应用: 时钟外围集成电路
文件页数/大小: 87 页 / 1210 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.29 – May 07, 2008  
440EP – PPC440EP Embedded Processor  
DDR SDRAM Write Operation  
Data Sheet  
The following diagram illustrates the relationship among the signals involved with a DDR write operation.  
Figure 9. DDR SDRAM Write Cycle Timing  
PLB Clk  
MemClkOut0  
MemClkOut0(90)  
T
SA  
Addr/Cmd  
T
DS  
T
T
SK  
DS  
T
HA  
DQS  
T
SD  
T
SD  
MemData  
T
HD  
T
HD  
T
= Delay from rising edge of MemClkOut0(0) to rising/falling edge of signal (skew)  
= Setup time for address and command signals to MemClkOut0(90)  
SK  
T
SA  
T
= Hold time for address and command signals from MemClkOut0(90)  
HA  
SD  
HD  
DS  
T
= Setup time for data signals (minimum time data is valid before rising/falling edge of DSQ)  
= Hold time for data signals (minimum time data is valid after rising/falling edge of DSQ)  
= Delay from rising/falling edge of clock to the rising/falling edge of DQS  
T
T
AMCC Proprietary  
77  
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