Revision 1.02 – January 11, 2005
PPC405CR – PowerPC 405CR Embedded Processor
Data Sheet
Table 14. I/O Specifications—133 and 200MHz
Notes:
1. The SDRAM command interface is configurable through SDRAM0_TR[LDF] to provide a 2 to 4 cycle delay before the
command is used by SDRAM.
2. SDRAM I/O timings are specified relative to a MemClkOut terminated into a lumped 10pF load.
3. SDRAM interface hold times are guaranteed at the PPC405CR package pin. System designers must use the PPC405CR
IBIS model (available from www.amcc.com) to ensure their clock distribution topology minimizes loading and reflections,
and that the relative delays on clock wiring do not exceed the delays on other SDRAM signal wiring.
4. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 0.8ns.
5. I/O H is specified at 2.4 V and I/O L is specified at 0.4 V.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(min)
I/O L
(min)
(TIS min)
(TIH min)
SDRAM Interface
BA1:0
n/a
n/a
n/a
n/a
n/a
n/a
2
n/a
n/a
n/a
n/a
n/a
n/a
1
7.3
5.8
7.3
4.7
6.2
6
1
1
1
1
1
1
1
1
1
1
1
19
19
19
40
19
19
19
19
19
19
19
12
12
12
25
12
12
12
12
12
12
12
MemClkOut
MemClkOut
MemClkOut
MemClkOut
MemClkOut
MemClkOut
MemClkOut
MemClkOut
MemClkOut
MemClkOut
MemClkOut
1, 2
2
BankSel0:3
CAS
1, 2
2
ClkEn0:1
DQM0:3
2
DQMCB
2
ECC0:7
6
2
MemAddr12:0
MemData0:31
RAS
n/a
2
n/a
1
7.8
6.2
7.4
7.4
1, 2
2
n/a
n/a
n/a
n/a
1, 2
1, 2
WE
External Slave Peripheral Interface
DMAAck0:3
DMAReq0:3
EOT0:3/TC0:3
PerAddr0:31
PerBLast
n/a
dc
dc
4
n/a
dc
dc
1
8
n/a
9
0
n/a
0
12
n/a
12
19
12
8
n/a
8
PerClk
PerClk
PerClk
PerClk
PerClk
10
8
0
12
8
4
1
0
PerCS0
PerCS1:7[GPIO10:16]
n/a
n/a
9
0
12
8
PerClk
PerData0:31
PerOE
6
n/a
4
1
n/a
1
10
8
0
0
19
12
19
12
n/a
12
12
8
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerPar0:3
PerR/W
10.5
8
0
12
8
5
1
0
PerReady
PerWBE0:3
9
1
n/a
8
n/a
0
n/a
8
4
1
External Master Peripheral Interface
BusReq
ExtAck
ExtReq
ExtReset
HoldAck
HoldPri
HoldReq
PerClk
n/a
n/a
6
n/a
n/a
1
8
8
0
0
12
12
8
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PLB Clk
PerClk
8
n/a
8
n/a
0
n/a
19
n/a
12
8
n/a
n/a
4
n/a
n/a
1
8
0
12
n/a
n/a
0.9
n/a
n/a
n/a
0.9
n/a
n/a
n/a
19
n/a
n/a
12
n/a
6
1
n/a
4
n/a
1
4
PerErr
n/a
AMCC
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