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PPC405CR-3BC200CZ 参数 Datasheet PDF下载

PPC405CR-3BC200CZ图片预览
型号: PPC405CR-3BC200CZ
PDF下载: 下载PDF文件 查看货源
内容描述: 405CR的PowerPC嵌入式处理器 [PowerPC 405CR Embedded Processor]
分类和应用: PC
文件页数/大小: 42 页 / 820 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.02 – January 11, 2005  
PPC405CR – PowerPC 405CR Embedded Processor  
Signal Descriptions  
Data Sheet  
The PPC405CR embedded controller is packaged in a 316-ball enhanced plastic ball grid array (E-PBGA). The fol-  
lowing table provides a summary of the number of package pins associated with each functional interface group.  
Table 5. Pin Summary  
Group  
SDRAM  
No. of Pins  
71  
97  
9
External Peripheral  
External Master  
Internal Peripheral  
Interrupts  
15  
7
JTAG  
5
System  
18  
222  
1
Total Signal Pins  
AVDD  
OVDD  
VDD  
16  
16  
40  
16  
5
Gnd  
Thermal (and Gnd)  
Reserved  
Total Pins  
316  
Multiplexed Pins  
In the table “Signal Functional Description” on page 23, each I/O signal is listed along with a short description of the  
signal function. Some signals are multiplexed onto the same package pin (ball) so that the pin can be used for dif-  
ferent functions. Multiplexed signals are shown as a default signal with a secondary signal in square brackets (for  
example, GPIO1[TS1E]). Active-low signals (for example, RAS) are marked with an overline.  
It is expected that in any single application a particular pin will always be programmed to serve the same function.  
The flexibility of multiplexing allows a single chip to offer a richer pin selection than would otherwise be possible.  
In addition to multiplexing, many pins are also multi-purpose. For example, the EBC peripheral controller address  
pins are used as outputs by the PPC405CR to broadcast an address to external slave devices when the  
PPC405CR has control of the external bus. When during the course of normal chip operation an external master  
gains ownership of the external bus, these same pins are used as inputs which are driven by the external master  
and received by the EBC in the PPC405CR.  
Intialization Strapping  
One group of pins is used as strapped inputs during system reset. These pins function as strapped inputs only dur-  
ing reset and are used for other functions during normal operation (see “Strapping” on page 39). Note that these  
are not multiplexed pins since the function of the pins is not programmable.  
Pull-Up and Pull-Down Resistors  
Pull-up and pull-down resistors are used for strapping during reset and to retain unused or undriven inputs in an  
appropriate state. The recommended pull-up value of 3kto +3.3V (10kto +5V can be used on 5V tolerant I/Os)  
and pull-down value of 1kto GND, applies only to individually terminated signals. To prevent possible damage to  
the device, I/Os capable of becoming outputs must never be tied together and terminated through a common  
resistor.  
AMCC  
21  
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