Revision 2.03 – September 7, 2007
405GP – Power PC 405GP Embedded Processor
Data Sheet
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause
permanent damage to the device
Characteristic
Supply Voltage (Internal Logic)
Symbol
Value
0 to +2.7
Unit
V
VDD
OVDD
AVDD
VIN
Supply Voltage (I/O Interface)
PLL Supply Voltage
0 to +3.6
V
0 to +2.7
V
-0.6 to VDD + 0.6
-0.6 to OVDD + 0.6
-0.6 to OVDD + 2.4
Input Voltage (2.5V CMOS receivers)
Input Voltage (3.3V LVTTL receivers)
Input Voltage (5.0V LVTTL receivers)
Storage Temperature Range
Case temperature under bias
V
VIN
V
VIN
V
TSTG
TC
-55 to +150
-40 to +120
°C
°C
Notes:
4. All specified voltages are with respect to GND.
Package Thermal Specifications
The PPC405GP is designed to operate within a case temperature range of -40°C to +85°C. Thermal resistance values for the
E-PBGA packages (leaded and lead-free) in a convection environment are as follows:
Airflow
ft/min (m/sec)
Symbol
Package—Thermal Resistance
Unit
0 (0)
100 (0.51)
200 (1.02)
35mm, 456-balls—Junction-to-Case
θJC
θCA
θJC
θCA
θJC
θCA
2
2
2
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
35mm, 456-balls—Case-to-Ambient1
27mm, 456-balls—Junction-to-Case
14
2
13
2
12
2
27mm, 456-balls—Case-to-Ambient1
25mm, 413-balls—Junction-to-Case
18
1.5
17
16
1.5
15
15
1.5
13
25mm, 413-balls—Case-to-Ambient1
Notes:
1. For a chip mounted on a JEDEC 2S2P card without a heat sink.
2. For a chip mounted on a card with at least one signal and two power planes, the following relationships exist:
a. Case temperature, TC, is measured at top center of case surface with device soldered to circuit board.
b. TA = TC – P×θCA, where TA is ambient temperature and P is power consumption.
c. TCMax = TJMax – P×θJC, where TJMax is maximum junction temperature and P is power consumption.
AMCC
43
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
