Revision 1.23 - January 28, 2009
PPC405EX – PowerPC 405EX Embedded Processor
Data Sheet
Power Control
This chip has power management control to put the following functional units to sleep if not needed. The typical
and maximum power consumption for the each of these units is:
Table 17. Power Contribution of Functional Units
Functional Unit
Typical
0.006
0.117
0.127
0.005
0.118
Maximum
0.012
Units
W
Notes
EBM/OPB
Security
Nand Flash
USB
0.230
W
0.246
W
0.008
W
EMAC
0.133
W
Test Conditions
Clock timing and switching characteristics are specified in accordance with minimum
operating conditions shown in the table “Recommended DC Operating Conditions” on
page 48. For all signals, AC specifications are characterized at TC = +85°C with the test
load shown in the figure to the right.
Output
Pin
10pF
Table 18. System Clocking Specifications
Symbol
CPU
Parameter
Minimum
Maximum
Units
PFC
Processor clock frequency (must be ≥ SCFC)
333.33
600
MHz
SysClk Input
SCFC
Frequency
33.33
na
100
±0.1
60
MHz
ns
SCTCS
SCTCH
SCTCL
SCRT
Edge stability (phase jitter, cycle-to-cycle)
High time (% of nominal period)
Low time (% of nominal period)
Rise time
40
%
40
60
%
na
1
ns
Other Clocks
VCOFC
VCO frequency
600
133
1800
200
100
100
MHz
MHz
MHz
MHz
PLBFC
OPBFC
AHBFc
PLB and MemClkOut0 frequency
OPB frequency
661
60
AHB frequency
Note 1: In order to support 1Gbps Ethernet data rate, the minimum OPB clock frequency is 66.66Mhz. If an application is
limited to 100Mbps, the minimum OPB clock frequency is 33.33Mhz.
54
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