Revision 1.12 - Novenber 20, 2007
PPC405EX – PowerPC 405EX Embedded Processor
Preliminary Data Sheet
Figure 6. Input Setup and Hold Timing Waveform for RGMII Signals
GMCnRxClk
1.25V
T
T
T
IS
MIN
T
IH
IH
IS
MIN
MIN
MIN
Inputs
1.25V
Valid
Valid
RGMII 1000Mb timing is with reference to the raising and falling edge of GMCnRxClk.
RGMII 10/100Mb timing is with reference only to the raising edge of GMCnRxClk.
Figure 7. Output Delay and Hold Timing Waveform for RGMII Signals
GMCnTxClk
1.25V
T
T
OH
OH
MIN
MIN
T
OV
T
MAX
OV
Outputs
MAX
High (Drive)
Float (High-Z)
Low (Drive)
Valid
Valid
Valid
Valid
RGMII 1000Mb timing is with reference to the raising and falling edge of GMCnTxClk.
RGMII 10/100Mb timing is with reference only to the raising edge of GMCnTxClk.
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AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
