Revision 1.01 – April 18, 2007
NPe405H – PowerNP NPe405H Embedded Processor
Data Sheet
PERIPHERAL INTERFACE CLOCK TIMINGS
Table 13. Peripheral Interface Clock Timings
Parameter
PCIClk input frequency (asynchronous mode)
PCIClk period (asynchronous mode)
Min
Note 2
15
Max
Units
MHz
ns
66
Note 2
PCIClk input high time
40% of nominal period
60% of nominal period
ns
PCIClk input low time
40% of nominal period
60% of nominal period
ns
EMC0MDClk output frequency
EMC0MDClk period
–
2.5
MHz
ns
400
–
EMC0MDClk output high time
EMC0MDClk output low time
PHY0TxClk input frequency
PHY0TxClk period
160
–
ns
160
–
ns
2.5
25
MHz
ns
40
400
PHY0TxClk input high time
PHY0TxClk input low time
PHY0RxClk input frequency
PHY0RxClk period
35% of nominal period
–
ns
35% of nominal period
–
ns
2.5
25
MHz
ns
40
400
PHY0RxClk input high time
PHY0RxClk input low time
PerClk output frequency–133MHz
PerClk period–133MHz
35% of nominal period
–
ns
35% of nominal period
–
ns
–
33.33
MHz
ns
30
–
PerClk output frequency–200MHz
PerClk period–200MHz
–
50
MHz
ns
20
–
PerClk output frequency–266MHz)
PerClk period–266MHz
–
66.66
MHz
ns
15
–
PerClk output high time
45% of nominal period
45% of nominal period
–
55% of nominal period
55% of nominal period
1000/(2TOPB + 2ns)
ns
PerClk output low time
ns
MHz
UARTSerClk input frequency (Note 1)
UARTSerClk period
2TOPB + 2
–
–
ns
ns
TOPB + 1
TOPB + 1
UARTSerClk input high time
UARTSerClk input low time
TmrClk input frequency–133MHz
TmrClk period–133MHz
–
ns
MHz
ns
–
33.33
30
–
TmrClk input frequency–200MHz
TmrClk period–200MHz
–
50
MHz
ns
20
–
TmrClk input frequency–266MHz
TmrClk period–266MHz
–
66.66
MHz
ns
15
–
TmrClk input high time
40% of nominal period
60% of nominal period
60% of nominal period
8.192
ns
TmrClk input low time
40% of nominal period
ns
HDLCEXTxClk, HDLCEXRxClk
0
–
MHz
MHz
HDLCMPTxClk, HDLCMPRxClk
2.048
Notes:
1.
T
is the period in ns of the OPB clock. The maximum OPB clock frequency is 33.33 MHz for 133MHz parts, 50 MHz for 200MHz parts, and 66.66MHz for 266MHz parts.
OPB
2. In asynchronous PCI mode the minimum PCIClk frequency is 1/8 the PLB Clock. Refer to the NPe405H User’s Manual for more information.
58
DS2011
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
