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CS5320 参数 Datasheet PDF下载

CS5320图片预览
型号: CS5320
PDF下载: 下载PDF文件 查看货源
内容描述: PCI匹配制造商, 3.3V [PCI Match Maker, 3.3V]
分类和应用: PC
文件页数/大小: 160 页 / 1544 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 5.03 – June 14, 2006  
S5320 – PCI Match Maker  
Data Sheet  
TABLE OF CONTENTS  
Add-On Incoming Mailbox Register (AIMB) ..................................................................................................... 70  
Add-On Outgoing Mailbox Register (AOMB) ................................................................................................... 70  
Add-On Pass-Thru Address Register (APTA) ................................................................................................. 70  
Add-On Pass-Thru Data Register (APTD) ....................................................................................................... 70  
Add-On Mailbox Empty/full Status Register (AMBEF) ..................................................................................... 71  
Add-On Interrupt Control/status Register (AINT) ............................................................................................. 73  
Add-On Reset Control Register (ARCR) ......................................................................................................... 75  
Add-On Pass-thru Configuration Register (APTCR) ....................................................................................... 77  
INITIALIZATION .................................................................................................................................................... 79  
PCI RESET ............................................................................................................................................................ 79  
LOADING THE SERIAL NV MEMORY ................................................................................................................. 79  
NON-VOLATILE MEMORY INTERFACE ............................................................................................................. 83  
NVRAM READ/WRITE DESCRIPTION ................................................................................................................. 83  
PCI BUS CONFIGURATION CYCLES .................................................................................................................. 86  
EXPANSION BIOS ROMS .................................................................................................................................... 87  
PCI BUS INTERFACE ........................................................................................................................................... 91  
PCI BUS TRANSACTIONS ................................................................................................................................... 91  
PCI BURST TRANSFERS ..................................................................................................................................... 92  
PCI READ TRANSFERS ....................................................................................................................................... 93  
PCI WRITE TRANSFERS ..................................................................................................................................... 93  
Target-Initiated Termination ............................................................................................................................ 94  
Target Disconnects .......................................................................................................................................... 94  
Target Requested Retries ............................................................................................................................... 94  
Target Aborts ................................................................................................................................................... 95  
Target Latency ................................................................................................................................................. 95  
Target Locking ................................................................................................................................................. 95  
PCI Bus Access Latency Components ............................................................................................................ 95  
PCI BUS INTERRUPTS ........................................................................................................................................ 97  
PCI BUS PARITY ERRORS .................................................................................................................................. 97  
MAILBOX OVERVIEW ........................................................................................................................................ 100  
FUNCTIONAL DESCRIPTION ............................................................................................................................ 100  
Mailbox Empty/Full Conditions ...................................................................................................................... 101  
Mailbox Interrupts .......................................................................................................................................... 101  
Add-On Outgoing Mailbox, Byte 3 Access .................................................................................................... 102  
BUS INTERFACE ................................................................................................................................................ 102  
PCI Bus Interface .......................................................................................................................................... 102  
Add-On Bus Interface .................................................................................................................................... 102  
8-Bit and 16-Bit Add-On Interfaces ................................................................................................................ 103  
CONFIGURATION ............................................................................................................................................... 103  
Mailbox Status ............................................................................................................................................... 103  
Writing the PCI Outgoing Mailbox: ................................................................................................................ 104  
6
DS1656  
AMCC Confidential and Proprietary  
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