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EPM9560A 参数 Datasheet PDF下载

EPM9560A图片预览
型号: EPM9560A
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件
文件页数/大小: 46 页 / 495 K
品牌: ALTERA [ ALTERA CORPORATION ]
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MAX 9000 Programmable Logic Device Family Data Sheet  
Figure 9. MAX 9000 Column-to-IOC Connections  
IOC10  
IOC1  
Each IOC is driven by  
a 17-to-1 multiplexer.  
Each IOC can drive up  
to two column  
channels.  
17  
17  
48  
48  
48  
Column FastTrack  
Interconnect  
Dedicated Inputs  
In addition to the general-purpose I/ O pins, MAX 9000 devices have four  
dedicated input pins. These dedicated inputs provide low-skew, device-  
wide signal distribution to the LABs and IOCs in the device, and are  
typically used for global clock, clear, and output enable control signals.  
The global control signals can feed the macrocell or IOC clock and clear  
inputs, as well as the IOC output enable. The dedicated inputs can also be  
used as general-purpose data inputs because they can feed the row  
FastTrack Interconnect (see Figure 2 on page 7).  
I/O Cells  
Figure 10 shows the IOC block diagram. Signals enter the MAX 9000  
device from either the I/ O pins that provide general-purpose input  
capability or from the four dedicated inputs. The IOCs are located at the  
ends of the row and column interconnect channels.  
16  
Altera Corporation  
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