MAX 7000 Programmable Logic Device Family Data Sheet
Figure 18. 84-Pin Package Pin-Out Diagram
Package outline not drawn to scale.
2()
)
(1)
I/O
VCCIO
(3)I/O/(TDI)
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
I/O
I/O
GND
I/O/(TDO) (3)
I/O
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
EPM7064
EPM7064S
EPM7096
(3)I/O/(TMS)
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O
I/O
I/O
GND
I/O/(TCK) (3)
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
EPM7128E
EPM7128S
EPM7160E
EPM7160S
)
(1)
84-Pin PLCC
Notes:
(1) Pins 6, 39, 46, and 79 are no-connect (N.C.) pins on EPM7096, EPM7160E, and EPM7160S devices.
(2) The pin functions shown in parenthesis are only available in MAX 7000E and MAX 7000S devices.
(3) JTAG ports are available in MAX 7000S devices only.
Altera Corporation
61
ALTERA [ ALTERA CORPORATION ]
