MAX 7000 Programmable Logic Device Family Data Sheet
Figure 17. 68-Pin Package Pin-Out Diagram
Package outlines not drawn to scale.
1()
I/O
VCCIO
(2) I/O/(TDI)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O
I/O
GND
I/O/(TDO) (2)
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O/(TCK) (2)
I/O
GND
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
(2) I/O/(TMS)
I/O
VCCIO
I/O
I/O
I/O
EPM7064
EPM7096
I/O
GND
I/O
I/O
68-Pin PLCC
Notes:
(1) The pin functions shown in parenthesis are only available in MAX 7000E and MAX
7000S devices.
(2) JTAG ports are available in MAX 7000S devices only.
60
Altera Corporation
ALTERA [ ALTERA CORPORATION ]
