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EPM240T100C5N 参数 Datasheet PDF下载

EPM240T100C5N图片预览
型号: EPM240T100C5N
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 17: Understanding and Evaluating Power in MAX II Devices
Power Saving Techniques
17–15
Table 17–8.
Thermal Analysis Information
Column Heading
Junction Temp, T
J
(°C)
θ
JA
Junction-Ambient
Maximum Allowed T
A
(°C)
Description
Represents the estimated device junction temperature.
Represents the junction-to-ambient thermal resistance through the top of the device
(°C/W).
Represents a guideline for the maximum ambient temperature (°C) that the device can
be subjected to without violating maximum junction temperature.
Power Supply Current
The power supply current provides the estimated current consumption for power
supplies. The I
CCPOWERUP
is only applicable during power up when the configuration
flash memory (CFM) block downloads to the SRAM. The I
CCINT
current is the supply
current required from V
CCINT
. The total I
CCIO
current is the supply current required from
V
CCIO
for all I/O banks. For estimates of I
CCIO
based on I/O banks, refer to the
of the PowerPlay Early Power Estimator spreadsheet.
shows the Power Supply Current section.
Figure 17–16.
Power Supply Current
describes the Power Supply Current parameters of the PowerPlay Early
Power Estimator spreadsheet.
Table 17–9.
Power Supply Current Information
Column Heading
I
CCPOWERUP
I
CCINT
I
CCIO
Description
Represents the maximum current drawn during power-up.
Represents the total current drawn from the I
CCINT
supply.
Represents the total current drawn from the I
CCIO
power rail(s). Refer to the
for details about the current drawn from each
I/O rail.
Power Saving Techniques
The following guidelines reduce power consumption for an application:
Slow the operation in portions of the circuit. I
CC
is proportional to the frequency of
operation. Slowing parts of a circuit lowers the I
CC
and therefore reduces the
power. MAX II devices provide global or array clock source for all registers.
Signals that do not require high-speed operation can use a slower array clock that
reduces the system power consumption.
Reduce the number of outputs. Standby and dynamic current are required to
support all I/O pins on the device. Reducing the number of I/O pins can reduce
current necessary for the device, and thereby reduce the power.