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EPM1270GT144I4N 参数 Datasheet PDF下载

EPM1270GT144I4N图片预览
型号: EPM1270GT144I4N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 8.1ns, 980-Cell, CMOS, PQFP144, 22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144]
分类和应用: LTE输入元件可编程逻辑
文件页数/大小: 108 页 / 1342 K
品牌: ALTERA [ ALTERA CORPORATION ]
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MAX II Architecture  
I/O Standards and Banks  
MAX II device IOEs support the following I/O standards:  
3.3-V LVTTL/LVCMOS  
2.5-V LVTTL/LVCMOS  
1.8-V LVTTL/LVCMOS  
1.5-V LVCMOS  
3.3-V PCI  
Table 2–4 describes the I/O standards supported by MAX II devices.  
Table 2–4. MAX II I/O Standards  
Output Supply Voltage  
I/O Standard  
Type  
(VCCIO) (V)  
3.3-V LVTTL/LVCMOS  
2.5-V LVTTL/LVCMOS  
1.8-V LVTTL/LVCMOS  
1.5-V LVCMOS  
Single-ended  
Single-ended  
Single-ended  
Single-ended  
Single-ended  
3.3  
2.5  
1.8  
1.5  
3.3  
3.3-V PCI (1)  
Note to Table 2–4:  
(1) The 3.3-V PCI is supported in Bank 3 of the EPM1270 and EPM2210 devices.  
The EPM240 and EPM570 devices support two I/O banks, as shown in  
Figure 2–22. Each of these banks support all the LVTTL and LVCMOS  
standards shown in Table 2–4. PCI I/O is not supported in these devices  
and banks.  
Altera Corporation  
March 2008  
2–33  
MAX II Device Handbook, Volume 1  
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