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EPF10K30RC208-3 参数 Datasheet PDF下载

EPF10K30RC208-3图片预览
型号: EPF10K30RC208-3
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式可编程逻辑器件系列 [Embedded Programmable Logic Device Family]
分类和应用: 可编程逻辑器件输入元件LTE时钟
文件页数/大小: 128 页 / 1975 K
品牌: ALTERA [ ALTERA CORPORATION ]
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FLEX 10K Embedded Programmable Logic Device Family Data Sheet  
LE Operating Modes  
The FLEX 10K LE can operate in the following four modes:  
Normal mode  
Arithmetic mode  
Up/down counter mode  
Clearable counter mode  
Each of these modes uses LE resources differently. In each mode, seven  
available inputs to the LE—the four data inputs from the LAB local  
interconnect, the feedback from the programmable register, and the  
carry-in and cascade-in from the previous LE—are directed to different  
destinations to implement the desired logic function. Three inputs to the  
LE provide clock, clear, and preset control for the register. The Altera  
software, in conjunction with parameterized functions such as LPM and  
DesignWare functions, automatically chooses the appropriate mode for  
common functions such as counters, adders, and multipliers. If required,  
the designer can also create special-purpose functions which use a specific  
LE operating mode for optimal performance.  
The architecture provides a synchronous clock enable to the register in all  
four modes. The Altera software can set DATA1to enable the register  
synchronously, providing easy implementation of fully synchronous  
designs.  
Figure 9 shows the LE operating modes.  
18  
Altera Corporation  
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