Chapter 8: External Memory Interfaces in the Cyclone III Device Family
8–5
Cyclone III Device Family Memory Interfaces Pin Support
Table 8–1. Cyclone III Device DQS and DQ Bus Mode Support for Each Side of the Device (Part 3 of 4)
Number Number Number Number Number Number
Device
Package
Side
×8
×9
×16
×18
×32
×36
Groups
Groups
Groups
Groups
Groups
Groups
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
Left
0
0
1
1
1
1
1
1
1
1
2
2
2
2
2
2
1
1
1
1
2
2
2
2
4
4
4
4
4
4
6
6
0
0
0
0
1
0
1
1
1
1
2
2
2
2
2
2
1
0
1
1
2
2
2
2
2
2
2
2
2
2
2
2
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
2
2
2
2
2
2
2
2
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
2
2
2
2
2
2
2
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
Right
(1)
144-pin EQFP
240-pin PQFP
(2)
Top
Bottom
(3), (4)
(4), (7)
Left
(3), (4)
Right
Top
(1)
Bottom
EP3C25
(4), (5)
Left
256-pin FineLine
BGA/256-pin
Ultra FineLine
(4), (6)
Right
Top
(1)
BGA
Bottom
Left
(8)
Right
Top
324-pin FineLine BGA
(1)
Bottom
(4), (7)
Left
(3), (4)
Right
Top
0
0
240-pin PQFP
0
0
Bottom
Left
0
0
0
0
(8)
Right
Top
0
0
324-pin FineLine BGA
0
0
Bottom
Left
0
0
EP3C40
1
1
484-pin FineLine
BGA/484-pin
Ultra FineLine
BGA
Right
Top
1
1
1
1
Bottom
Left
1
1
1
1
Right
Top
1
1
780-pin FineLine BGA
1
1
Bottom
1
1
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 1
ALTERA [ ALTERA CORPORATION ]
