8–4
Chapter 8: External Memory Interfaces in the Cyclone III Device Family
Cyclone III Device Family Memory Interfaces Pin Support
Table 8–1. Cyclone III Device DQS and DQ Bus Mode Support for Each Side of the Device (Part 2 of 4)
Number Number Number Number Number Number
Device
Package
Side
×8
×9
×16
×18
×32
×36
Groups
Groups
Groups
Groups
Groups
Groups
Left
0
0
1
1
0
0
1
1
1
1
2
2
0
0
1
1
0
0
1
1
1
1
1
1
1
1
2
2
4
4
4
4
0
0
0
0
0
0
0
0
1
1
2
2
0
0
0
0
0
0
0
0
1
0
1
1
1
1
2
2
2
2
2
2
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
2
2
2
2
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
2
2
2
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
Right
(1)
144-pin EQFP
164-pin MBGA
(2)
Top
(3), (4)
Bottom
Left
Right
(1)
EP3C10
(2)
Top
(3), (4)
Bottom
(4), (5)
Left
256-pin FineLine
BGA/256-pin Ultra
(4), (6)
Right
Top
(1)
FineLine BGA
Bottom
Left
Right
(1)
144-pin EQFP
(2)
Top
(3), (4)
Bottom
Left
Right
(1)
164-pin MBGA
(2)
Top
(3), (4)
Bottom
(4), (7)
Left
(3), (4)
Right
Top
(1)
EP3C16
240-pin PQFP
Bottom
(4), (5)
Left
256-pin FineLine
BGA/256-pin
Ultra FineLine
(4), (6)
Right
Top
(1)
BGA
Bottom
Left
484-pin FineLine
BGA/484-pin
Ultra FineLine
BGA
Right
Top
1
1
1
1
Bottom
1
1
Cyclone III Device Handbook
Volume 1
December 2011 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
