Chapter 1: Cyclone III Device Family Overview
Document Revision History
1–13
Document Revision History
lists the revision history for this document.
Table 1–7. Document Revision History
Date
July 2012
Version
2.4
Updated Table 1–1 and Table 1–2.
Updated Figure 1–1 and Figure 1–2.
Updated hyperlinks.
Minor text edits.
Changes
Updated 484 pin package code in
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December 2011
2.3
December 2009
July 2009
2.2
2.1
Minor text edits.
Minor edit to the hyperlinks.
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Added Table 1–5.
Updated Table 1–1, Table 1–2, Table 1–3, and Table 1–4.
Updated “Introduction”, “Cyclone III Device Family Architecture”, “Embedded Multipliers
and Digital Signal Processing Support ”, “Clock Networks and PLLs ”, “I/O Features ”,
“High-Speed Differential Interfaces ”, “Auto-Calibrating External Memory Interfaces ”,
“Quartus II Software Support”, “Configuration ”, and “Design Security (Cyclone III LS
Devices Only)”.
Removed “Referenced Document” section.
Updated “Increased System Integration” section.
Updated “Memory Blocks” section.
Updated chapter to new template.
Added 164-pin Micro FineLine Ball-Grid Array (MBGA) details to Table 1–2, Table 1–3 and
Table 1–4.
Updated Figure 1–2 with automotive temperature information.
Updated “Increased System Integration” section, Table 1–6, and “High-Speed Differential
Interfaces” section with BLVDS information.
Removed the text “Spansion” in “Increased System.
Integration” and “Configuration” sections.
Removed trademark symbol from “MultiTrack” in “MultiTrack Interconnect”.
Removed registered trademark symbol from “Simulink” and “MATLAB” from “Embedded
Multipliers and Digital.
Signal Processing Support” section.
Added chapter TOC and “Referenced Documents” section.
June 2009
2.0
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October 2008
1.3
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May 2008
1.2
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July 2007
1.1
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March 2007
1.0
Initial release.
July 2012
Altera Corporation
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