6–18
Chapter 6: I/O Features in the Cyclone III Device Family
I/O Banks
1
When VREFpins are used as regular I/Os, they have higher pin capacitance than
regular user I/O pins. This has an impact on the timing if the pins are used as inputs
and outputs.
f
f
For more information about VREFpin capacitance, refer to the pin capacitance section
in the Cyclone III Device Data Sheet and Cyclone III LS Device Data Sheet chapters.
For more information about how to identify VREF groups, refer to the Cyclone III
Device Family Pin-Out files or the Quartus II Pin Planner tool.
Table 6–6 lists the number of VREFpins in each I/O bank for Cyclone III and
Cyclone III LS devices.
Table 6–6. Number of VREF Pins Per I/O Banks for Cyclone III and Cyclone III LS Devices (Part 1 of 2)
I/O Banks
Family
Device
Package
Pin Count
1
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
2
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
3
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
4
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
5
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
6
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
7
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
8
1
1
1
1
1
1
2
2
2
2
2
1
1
1
1
4
4
4
4
2
2
3
3
3
3
EQFP
MBGA
FBGA
EQFP
MBGA
FBGA
EQFP
MBGA
PQFP
FBGA
FBGA
EQFP
PQFP
FBGA
FBGA
PQFP
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
144
164
256
144
164
256
144
164
240
256
484
144
240
256
324
240
324
484
780
484
780
484
780
484
780
EP3C5
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
EP3C120
Cyclone III Device Handbook
Volume 1
July 2012 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
