Chapter 5: Clock Networks and PLLs in the Cyclone III Device Family
Document Revision History
5–35
Table 5–11. Document Revision History (Part 2 of 2)
Date
Version
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Changes
Updated document with EP3C120 information.
Updated Table 5–1 and Table 5–4 with EP3C120 information.
Updated “Clock Control Block” section.
Updated locked signal information in “PLL Control Signals” section and added
Figure 5–16.
Updated “Manual Override” section, updated “Manual Clock Switchover” section.
Added new “Programmable Bandwidth” section with Figure 5–21 and Figure 5–22.
Replaced Figure 5-30 with correct diagram.
Added chapter TOC and “Referenced Documents” section.
July 2007
1.1
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March 2007
1.0
Initial release.
July 2012
Altera Corporation
Cyclone III Device Handbook
Volume 1