9–70
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Design Security
lists the optional configuration pins. If these optional configuration pins
are not enabled in the Quartus II software, they are available as general-purpose user
I/O pins. Therefore, during configuration, these pins function as user I/O pins and
are tri-stated with weak pull-up resistors.
Table 9–23. Optional Configuration Pins
Pin Name
User Mode
N/A if option is on.
I/O if option is off.
Pin Type
Description
Optional user-supplied clock input synchronizes the initialization
of one or more devices. This pin is enabled by turning on the
Enable user-supplied start-up clock
(CLKUSR) option in the
Quartus II software.
Status pin used to indicate when the device has initialized and is
in user-mode. When
nCONFIG
is low and during the beginning
of configuration, the
INIT_DONE
pin is tri-stated and pulled high
due to an external 10-k pull-up resistor. After the option bit to
enable
INIT_DONE
is programmed into the device (during the
first frame of configuration data), the
INIT_DONE
pin goes low.
When initialization is complete, the
INIT_DONE
pin is released
and pulled high and the device enters user mode. Thus, the
monitoring circuitry must be able to detect a low-to-high
transition. This pin is enabled by turning on the
Enable
INIT_DONE output
option in the Quartus II software.
The functionality of this pin changes if the
Enable OCT_DONE
option is enabled in the Quartus II software. This option
controls whether the
INIT_DONE
signal is gated by the
OCT_DONE
signal, which indicates the Power-Up OCT calibration
is complete. If this option is turned off, the
INIT_DONE
signal is
not gated by the
OCT_DONE
signal
Optional pin that allows you to override all tri-states on the
device. When this pin is driven low, all I/O pins are tri-stated;
when this pin is driven high, all I/O pins behave as programmed.
This pin is enabled by turning on the
Enable device-wide
output enable (DEV_OE)
option in the Quartus II software.
Optional pin that allows you to override all clears on all device
registers. When this pin is driven low, all registers are cleared;
when this pin is driven high, all registers behave as
programmed. This pin is enabled by turning on the
Enable
device-wide reset (DEV_CLRn)
option in the Quartus II
software.
CLKUSR
Input
INIT_DONE
N/A if option is on.
I/O if option is off.
Output
open-drain
DEV_OE
N/A if option is on.
I/O if option is off.
Input
DEV_CLRn
N/A if option is on.
I/O if option is off.
Input
Design Security
The design security feature is for Cyclone III LS devices only. The design security
feature is not supported in Cyclone III devices.
Cyclone III LS Design Security Protection
Cyclone III LS device designs are protected from copying, reverse engineering, and
tampering using configuration bitstream encryption and anti-tamper features.
Cyclone III Device Handbook
Volume 1
August 2012 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
