Chapter 8: External Memory Interfaces in the Cyclone III Device Family
Cyclone III Device Family Memory Interfaces Pin Support
8–9
Figure 8–2. DQS, CQ, or CQ# Pins in Cyclone III Device Family I/O Banks
DQS1T/CQ1T#
DQS3T/CQ3T#
DQS5T/CQ5T#
DQS4T/CQ5T
DQS2T/CQ3T
DQS0T/CQ1T
I/O Bank 8
I/O Bank 1
DQS2L/CQ3L
I/O Bank 7
DQS2R/CQ3R
I/O Bank 6
DQS0L/CQ1L
DQS0R/CQ1R
Cyclone III Device Family
I/O Bank 2
DQS1L/CQ1L#
DQS1R/CQ1R#
I/O Bank 5
DQS3L/CQ3L#
DQS3R/CQ3R#
I/O Bank 3
I/O Bank 4
DQS3B/CQ3B#
DQS4B/CQ5B
DQS2B/CQ3B
Note to
(1) The DQS, CQ, or CQ# pin locations in this diagram apply to all packages in Cyclone III device family except devices in 144-pin EQFP and 164-pin
MBGA.
shows the location and numbering of the DQS, DQ, or CQ# pins in I/O
banks of the Cyclone III device in the 144-pin EQFP and 164-pin MBGA packages
only.
Figure 8–3. DQS, CQ, or CQ# Pins for Devices in the 144-Pin EQFP and 164-Pin MBGA Packages
DQS1T/CQ1T#
DQS0T/CQ1T
I/O Bank 7
DQS0R/CQ1R
I/O Bank 6
Cyclone III Devices
in 144-pin EQFP and
164-pin MBGA
I/O Bank 5
I/O Bank 2
I/O Bank 8
DQS0L/CQ1L
DQS1L/CQ1L#
I/O Bank 1
DQS1B/CQ1B#
DQS5B/CQ5B#
DQS0B/CQ1B
DQS1R/CQ1R#
I/O Bank 3
I/O Bank 4
DQS1B/CQ1B#
July 2012
Altera Corporation
DQS0B/CQ1B
Cyclone III Device Handbook
Volume 1
ALTERA [ ALTERA CORPORATION ]
