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EP2S90F1020C4N 参数 Datasheet PDF下载

EP2S90F1020C4N图片预览
型号: EP2S90F1020C4N
PDF下载: 下载PDF文件 查看货源
内容描述: Stratix II系列提供了以下功能 [The Stratix II family offers the following features]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 238 页 / 2897 K
品牌: ALTERA [ ALTERA CORPORATION ]
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PLLs & Clock Networks  
IOE clocks have row and column block regions that are clocked by eight  
I/O clock signals chosen from the 24 quadrant clock resources.  
Figures 2–35 and 2–36 show the quadrant relationship to the I/O clock  
regions.  
Figure 2–35. EP2S15 & EP2S30 Device I/O Clock Groups  
IO_CLKA[7:0]  
IO_CLKB[7:0]  
8
8
I/O Clock Regions  
8
24 Clocks in  
the Quadrant  
24 Clocks in  
the Quadrant  
IO_CLKH[7:0]  
IO_CLKC[7:0]  
IO_CLKD[7:0]  
8
8
IO_CLKG[7:0]  
24 Clocks in  
the Quadrant  
24 Clocks in  
the Quadrant  
8
8
8
IO_CLKF[7:0]  
IO_CLKE[7:0]  
2–52  
Altera Corporation  
May 2007  
Stratix II Device Handbook, Volume 1  
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