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EP2S90F1020C4N 参数 Datasheet PDF下载

EP2S90F1020C4N图片预览
型号: EP2S90F1020C4N
PDF下载: 下载PDF文件 查看货源
内容描述: Stratix II系列提供了以下功能 [The Stratix II family offers the following features]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 238 页 / 2897 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Stratix II Hot-Socketing Specifications  
Devices Can Be Driven Before Power-Up  
You can drive signals into the I/O pins, dedicated input pins and  
dedicated clock pins of Stratix II devices before or during power-up or  
power-down without damaging the device. Stratix II devices support any  
power-up or power-down sequence (VCCIO, VCCINT, and VCCPD) in order  
to simplify system level design.  
I/O Pins Remain Tri-Stated During Power-Up  
A device that does not support hot-socketing may interrupt system  
operation or cause contention by driving out before or during power-up.  
In a hot socketing situation, Stratix II device's output buffers are turned  
off during system power-up or power-down. Stratix II device also does  
not drive out until the device is configured and has attained proper  
operating conditions.  
Signal Pins Do Not Drive the VCCIO, VCCINT or VCCPD Power  
Supplies  
Devices that do not support hot-socketing can short power supplies  
together when powered-up through the device signal pins. This irregular  
power-up can damage both the driving and driven devices and can  
disrupt card power-up.  
Stratix II devices do not have a current path from I/O pins, dedicated  
input pins, or dedicated clock pins to the VCCIO, VCCINT, or VCCPD pins  
before or during power-up. A Stratix II device may be inserted into (or  
removed from) a powered-up system board without damaging or  
interfering with system-board operation. When hot-socketing, Stratix II  
devices may have a minimal effect on the signal integrity of the  
backplane.  
1
You can power up or power down the VCCIO, VCCINT, and VCCPD  
pins in any sequence. The power supply ramp rates can range  
from 100 μs to 100 ms. All VCC supplies must power down  
within 100 ms of each other to prevent I/O pins from driving  
out. During hot socketing, the I/O pin capacitance is less than 15  
pF and the clock pin capacitance is less than 20 pF. Stratix II  
devices meet the following hot socketing specification.  
The hot socketing DC specification is: | IIOPIN | < 300 μA.  
The hot socketing AC specification is: | IIOPIN | < 8 mA for 10 ns or  
less.  
4–2  
Stratix II Device Handbook, Volume 1  
Altera Corporation  
May 2007