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EP2C50A15Q324C6ES 参数 Datasheet PDF下载

EP2C50A15Q324C6ES图片预览
型号: EP2C50A15Q324C6ES
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件系列 [Cyclone II Device Family]
分类和应用:
文件页数/大小: 168 页 / 2205 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Cyclone II Architecture  
There is only one signa and one signb signal for each dedicated  
multiplier. Therefore, all of the data A inputs feeding the same dedicated  
multiplier must have the same sign representation. Similarly, all of the  
data B inputs feeding the same dedicated multiplier must have the same  
sign representation. The signa and signb signals can be changed  
dynamically to modify the sign representation of the input operands at  
run time. The multiplier offers full precision regardless of the sign  
representation and can be registered using dedicated registers located at  
the input register stage.  
Multiplier Modes  
Table 2–12 summarizes the different modes that the embedded  
multipliers can operate in.  
Table 2–12. Embedded Multiplier Modes  
Multiplier Mode  
Description  
18-bit Multiplier  
An embedded multiplier can be configured to support a  
single 18 × 18 multiplier for operand widths up to 18 bits.  
All 18-bit multiplier inputs and results can be registered  
independently. The multiplier operands can accept  
signed integers, unsigned integers, or a combination of  
both.  
9-bit Multiplier  
An embedded multiplier can be configured to support  
two 9 × 9 independent multipliers for operand widths up  
to 9-bits. Both 9-bit multiplier inputs and results can be  
registered independently. The multiplier operands can  
accept signed integers, unsigned integers or a  
combination of both.  
There is only one signa signal to control the sign  
representation of both data A inputs and one signb  
signal to control the sign representation of both data B  
inputs of the 9-bit multipliers within the same dedicated  
multiplier.  
Altera Corporation  
February 2007  
2–35  
Cyclone II Device Handbook, Volume 1  
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