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EP2C50A15Q324C6ES 参数 Datasheet PDF下载

EP2C50A15Q324C6ES图片预览
型号: EP2C50A15Q324C6ES
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件系列 [Cyclone II Device Family]
分类和应用:
文件页数/大小: 168 页 / 2205 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Embedded Multipliers  
Figure 2–17. M4K RAM Block LAB Row Interface  
C4 Interconnects  
R4 Interconnects  
16  
Direct link  
Direct link  
interconnect  
to adjacent LAB  
interconnect  
to adjacent LAB  
dataout  
M4K RAM  
Block  
Direct link  
Direct link  
16  
16  
interconnect  
interconnect  
from adjacent LAB  
from adjacent LAB  
Byte enable  
Control  
Signals  
Clocks  
address  
datain  
6
M4K RAM Block Local  
Interconnect Region  
LAB Row Clocks  
f
For more information on Cyclone II embedded memory, see the  
Cyclone II Memory Blocks chapter in Volume 1 of the Cyclone II Device  
Handbook.  
Cyclone II devices have embedded multiplier blocks optimized for  
multiplier-intensive digital signal processing (DSP) functions, such as  
finite impulse response (FIR) filters, fast Fourier transform (FFT)  
functions, and discrete cosine transform (DCT) functions. You can use the  
embedded multiplier in one of two basic operational modes, depending  
on the application needs:  
Embedded  
Multipliers  
One 18-bit multiplier  
Up to two independent 9-bit multipliers  
2–32  
Altera Corporation  
February 2007  
Cyclone II Device Handbook, Volume 1  
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