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EP2C35F672C8N 参数 Datasheet PDF下载

EP2C35F672C8N图片预览
型号: EP2C35F672C8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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DC Characteristics and Timing Specifications  
Final timing numbers are based on actual device operation and testing.  
These numbers reflect the actual performance of the device under  
worst-case voltage and junction temperature conditions.  
Table 5–14. Cyclone II Device Timing Model Status  
Device  
Speed Grade  
Commercial/Industrial  
Automotive  
Preliminary  
Final  
EP2C5/A  
EP2C8/A  
EP2C15A  
EP2C20/A  
v
v
Commercial/Industrial  
Automotive  
v
v
Commercial/Industrial  
Automotive  
v
v
Commercial/Industrial  
Automotive  
v
v
EP2C35  
EP2C50  
EP2C70  
Commercial/Industrial  
Commercial/Industrial  
Commercial/Industrial  
v
v
v
Performance  
Table 5–15 shows Cyclone II performance for some common designs. All  
performance values were obtained with Quartus II software compilation  
of LPM, or MegaCore functions for the FIR and FFT designs.  
Table 5–15. Cyclone II Performance (Part 1 of 4)  
Resources Used  
Performance (MHz)  
–7 –7  
Speed Speed  
Grade Grade  
M4K  
LEs Memory  
Blocks  
–6  
Speed  
Grade  
–8  
Speed  
Grade  
Applications  
DSP  
Blocks  
(6)  
(7)  
LE  
16-to-1 multiplexer (1)  
32-to-1 multiplexer (1)  
16-bit counter  
21  
38  
16  
64  
0
0
0
0
0
0
0
0
385.35 313.97 270.85 286.04  
294.2  
401.6  
260.75 228.78 191.02  
349.4 310.65 310.65  
64-bit counter  
157.15 137.98 126.08 126.27  
Altera Corporation  
February 2008  
5–15  
Cyclone II Device Handbook, Volume 1  
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