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EP2C20F256C8N 参数 Datasheet PDF下载

EP2C20F256C8N图片预览
型号: EP2C20F256C8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 可编程逻辑PC时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Selectable I/O Standards in Cyclone II Devices  
VREF Pad Placement Guidelines  
To maintain an acceptable noise level on the VCCIO supply and to prevent  
output switching noise from shifting the VREF rail, there are restrictions on  
the placement of single-ended voltage referenced I/Os with respect to  
VREF pads and VCCIOand ground pairs. Use the following guidelines for  
placing single-ended pads in Cyclone II devices.  
The Quartus II software automatically does all the calculations in this  
section.  
Input Pads  
Each VREF pad supports up to 15 input pads on each side of the VREF pad  
for FineLine BGA devices. Each VREF pad supports up to 10 input pads on  
each side of the VREF pad for quad flat pack (QFP) devices. This is  
irrespective of VCCIOand ground pairs, and is guaranteed by the  
Cyclone II architecture.  
Output Pads  
When a voltage referenced input or bidirectional pad does not exist in a  
bank, there is no limit to the number of output pads that can be  
implemented in that bank. When a voltage referenced input exists, each  
VCCIOand ground pair supports 9 output pins for Fineline BGA  
packages (not more than 9 output pins per 12 consecutive row I/O pins)  
or 5 output pins for QFP packages (not more than 5 output pins per 12  
consecutive row I/O pins or 8 consecutive column I/O pins). Any  
non-SSTL and non-HSTL output can be no closer than two pads away  
from a VREF pad. Altera recommends that any SSTL or HSTL output,  
except for pintable defined DQ and DQS outputs, to be no closer than two  
pads away from a VREF pad to maintain acceptable noise levels.  
1
Quartus II software will not check for the SSTL and HSTL  
output pads placement rule.  
Refer to “DDR and QDR Pads” on page 10–32 for details about guidelines  
for DQ and DQS pads placement.  
Bidirectional Pads  
Bidirectional pads must satisfy input and output guidelines  
simultaneously.  
Refer to “DDR and QDR Pads” on page 10–32 for details about guidelines  
for DQ and DQS pads placement.  
Altera Corporation  
February 2008  
10–29  
Cyclone II Device Handbook, Volume 1  
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