Section II. Clock
Management
This section provides information on the phase-locked loops (PLLs).
Cyclone® II PLLs offer general-purpose clock management with
multiplication and phase shifting and also have the ability to drive off
chip to control system-level clock networks. This section contains
detailed information on the features, the interconnections to the logic
array and off chip, and the specifications for Cyclone II PLLs.
This section includes the following chapter:
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Chapter 7, PLLs in Cyclone II Devices
Refer to each chapter for its own specific revision history. For information
on when each chapter was updated, refer to the Chapter Revision Dates
section, which appears in the complete handbook.
Revision History
Altera Corporation
Section II–1
Preliminary
ALTERA [ ALTERA CORPORATION ]
