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EP1SGX40GF1020I6N 参数 Datasheet PDF下载

EP1SGX40GF1020I6N图片预览
型号: EP1SGX40GF1020I6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 4697 CLBs, 41250-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, LEAD FREE, FBGA-1020]
分类和应用: 可编程逻辑
文件页数/大小: 279 页 / 3682 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Operating Conditions  
Table 6–13. 3.3-V LVDS I/O Specifications (Part 2 of 2)  
Symbol  
Parameter  
Conditions  
Minimum Typical Maximum Units  
VICM (1)  
Input common-mode  
voltage  
LVDS  
0.3 V < VID < 1.0 V  
W = 1 through 10  
100  
1,600  
1,100  
1,100  
250  
1,100  
1,800  
1,600  
1,600  
mV  
mV  
mV  
mV  
LVDS  
0.3 V < VID < 1.0 V  
W = 1 through 10  
LVDS  
0.2 V < VID < 1.0 V  
W = 1  
LVDS  
0.1 V < VID < 1.0 V  
W = 2 through 10  
VOD  
Differential output voltage RL = 100 Ω  
375  
550  
50  
mV  
mV  
ΔVOD  
Change in VOD between  
high and low  
RL = 100 Ω  
VOCM  
ΔVOCM  
RL  
Output common-mode  
voltage  
RL = 100 Ω  
1,125  
90  
1,200  
1,375  
50  
mV  
mV  
Ω
Change in VOCM between RL = 100 Ω  
high and low  
Receiver differential input  
resistor, external  
100  
110  
Note to Table 6–13:  
(1) For up to 1 Gbps in DPA mode and 840 Mbps in non-DPA mode  
Table 6–14. 3.3-V PCML Specifications (Part 1 of 2)  
Symbol  
Parameter  
Conditions  
Minimum Typical Maximum Units  
VCCIO  
I/O supply voltage  
3.135  
300  
3.3  
3.465  
600  
V
VID  
Input differential voltage  
swing (single-ended)  
mV  
VICM  
VOD  
Input common mode  
voltage  
1.5  
3.465  
500  
50  
V
mV  
mV  
V
Output differential voltage  
(single-ended)  
300  
370  
ΔVOD  
VOCM  
Change in VOD between  
high and low  
Output common mode  
voltage  
2.5  
2.85  
3.3  
6–14  
Altera Corporation  
August 2005  
Stratix GX Device Handbook, Volume 1  
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