Timing Model
Performance
Table 4–36 shows Stratix performance for some common designs. All
performance values were obtained with Quartus II software compilation
of LPM, or MegaCore® functions for the FIR and FFT designs.
Table 4–36. Stratix Performance (Part 1 of 2) Notes (1), (2)
Resources Used
Performance
-7 -8
Speed Speed Speed Speed Units
Grade Grade Grade Grade
TriMatrix
LEs Memory
Blocks
-5
-6
Applications
DSP
Blocks
LE
16-to-1 multiplexer (1) 22
32-to-1 multiplexer (3) 46
0
0
0
0
1
0
0
0
0
0
407.83 324.56 288.68 228.67
318.26 255.29 242.89 185.18
422.11 422.11 390.01 348.67
321.85 290.52 261.23 220.5
317.76 277.62 241.48 205.21
MHz
MHz
MHz
MHz
MHz
16-bit counter
64-bit counter
16
64
0
TriMatrix
memory
Simple dual-port RAM
32 × 18 bit
M512 block
FIFO 32 × 18 bit
30
0
1
1
0
0
319.18 278.86 242.54 206.14
290.86 255.55 222.27 188.89
MHz
MHz
TriMatrix
memory
Simple dual-port RAM
128 × 36 bit
M4K block
True dual-port RAM
0
1
0
290.86 255.55 222.27 188.89
MHz
128 × 18 bit
FIFO 128 × 36 bit
34
1
1
1
0
0
290.86 255.55 222.27 188.89
255.95 223.06 194.06 164.93
MHz
MHz
TriMatrix
memory
M-RAM
block
Single port
RAM 4K × 144 bit
Simple dual-port
RAM 4K × 144 bit
0
0
1
1
0
0
255.95 233.06 194.06 164.93
255.95 233.06 194.06 164.93
MHz
MHz
True dual-port
RAM 4K × 144 bit
Single port
RAM 8K × 72 bit
0
0
1
1
0
0
278.94 243.19 211.59 179.82
255.95 223.06 194.06 164.93
MHz
MHz
Simple dual-port
RAM 8K × 72 bit
0
1
0
255.95 223.06 194.06 164.93
MHz
True dual-port
RAM 8K × 72 bit
Single port
RAM 16K × 36 bit
0
0
1
1
0
0
280.66 254.32 221.28 188.00
269.83 237.69 206.82 175.74
MHz
MHz
Simple dual-port
RAM 16K × 36 bit
4–20
Altera Corporation
July 2005
Stratix Device Handbook, Volume 1