DC & Switching Characteristics
Definition of I/O Skew
I/O skew is defined as the absolute value of the worst-case difference in
clock-to-out times (tCO) between any two output registers fed by a
common clock source.
I/O bank skew is made up of the following components:
■
■
Clock network skews: This is the difference between the arrival times
of the clock at the clock input port of the two IOE registers.
Package skews: This is the package trace length differences between
(I/O pad A to I/O pin A) and (I/O pad B to I/O pin B).
Figure 4–5 shows an example of two IOE registers located in the same
bank, being fed by a common clock source. The clock can come from an
input pin or from a PLL output.
Figure 4–5. I/O Skew within an I/O Bank
I/O Bank
I/O Pin A
Common Source of GCLK
I/O Pin B
Fast Edge
I/O Pin A
Slow Edge
I/O Pin B
I/O Skew
I/O Skew
Altera Corporation
January 2006
4–57
Stratix Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
