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EP1K30TC144-3N 参数 Datasheet PDF下载

EP1K30TC144-3N图片预览
型号: EP1K30TC144-3N
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件LTE
文件页数/大小: 86 页 / 1204 K
品牌: ALTERA [ ALTERA CORPORATION ]
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ACEX 1K Programmable Logic Device Family Data Sheet  
Table 16. 32-Bit IDCODE for ACEX 1K Devices  
Note (1)  
Device  
IDCODE (32 Bits)  
Version  
(4 Bits)  
Part Number (16 Bits)  
Manufacturer’s  
Identity (11 Bits)  
1 (1 Bit) (2)  
EP1K10  
EP1K30  
EP1K50  
EP1K100  
0001  
0001  
0001  
0010  
0001 0000 0001 0000  
0001 0000 0011 0000  
0001 0000 0101 0000  
0000 0001 0000 0000  
00001101110  
00001101110  
00001101110  
00001101110  
1
1
1
1
Notes to tables:  
(1) The most significant bit (MSB) is on the left.  
(2) The least significant bit (LSB) for all JTAG IDCODEs is 1.  
ACEX 1K devices include weak pull-up resistors on the JTAG pins.  
For more information, see the following documents:  
f
Application Note 39 (IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in  
Altera Devices)  
ByteBlasterMV Parallel Port Download Cable Data Sheet  
BitBlaster Serial Download Cable Data Sheet  
Jam Programming & Test Language Specification  
13  
Figure 20 shows the timing requirements for the JTAG signals.  
Altera Corporation  
43  
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