ACEX 1K Programmable Logic Device Family Data Sheet
Figure 14. ACEX 1K Interconnect Resources
See Figure 17
for details.
I/O Element (IOE)
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
Row
Interconnect
LAB
A1
LAB
A2
LAB
A3
See Figure 16
for details.
Column
Interconnect
To LAB A5
To LAB A4
IOE
IOE
IOE
IOE
13
LAB
B1
LAB
B2
LAB
B3
Cascade &
Carry Chains
To LAB B5
To LAB B4
IOE
IOE
IOE
IOE
IOE
IOE
I/O Element
An IOE contains a bidirectional I/ O buffer and a register that can be used
either as an input register for external data that requires a fast setup time
or as an output register for data that requires fast clock-to-output
performance. In some cases, using an LE register for an input register will
result in a faster setup time than using an IOE register. IOEs can be used
as input, output, or bidirectional pins. The compiler uses the
programmable inversion option to invert signals from the row and
column interconnect automatically where appropriate. For bidirectional
registered I/ O implementation, the output register should be in the IOE
and the data input and output enable registers should be LE registers
placed adjacent to the bidirectional pin. Figure 15 shows the bidirectional
I/ O registers.
Altera Corporation
29
ALTERA [ ALTERA CORPORATION ]
