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EP1C6F256I8 参数 Datasheet PDF下载

EP1C6F256I8图片预览
型号: EP1C6F256I8
PDF下载: 下载PDF文件 查看货源
内容描述: 气旋FPGA系列 [Cyclone FPGA Family]
分类和应用: 可编程逻辑时钟
文件页数/大小: 94 页 / 1066 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Cyclone FPGA Family Data Sheet  
Preliminary Information  
All embedded blocks communicate with the logic array similar to LAB-to-  
LAB interfaces. Each block (i.e., M4K memory or PLL) connects to row  
and column interconnects and has local interconnect regions driven by  
row and column interconnects. These blocks also have direct link  
interconnects for fast connections to and from a neighboring LAB.  
Table 5 shows the Cyclone device’s routing scheme.  
Table 5. Cyclone Device Routing Scheme  
Source  
Destination  
LUT Chain  
v
v
v
Register Chain  
Local Interconnect  
v
v
v
v
Direct Link  
v
Interconnect  
R4 Interconnect  
C4 Interconnect  
LE  
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
M4K RAM Block  
PLL  
Column IOE  
Row IOE  
v
v
22  
Altera Corporation  
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