Preliminary Information
Cyclone FPGA Family Data Sheet
Table 32. 3.3-V PCI Specifications
Symbol
Parameter
Conditions
Minimum Typical Maximum
Unit
VCCIO
Output supply voltage
High-level input voltage
3.0
3.3
3.6
V
V
VIH
0.5 ×
VCCIO
0.5
+
VCCIO
VIL
Low-level input voltage
High-level output voltage
Low-level output voltage
–0.5
0.3 ×
V
V
V
VCCIO
VOH
VOL
IOUT = –500 µA
IOUT = 1,500 µA
0.9 ×
VCCIO
0.1 ×
VCCIO
Table 33. SSTL-2 Class I Specifications
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
Unit
VCCIO
Output supply voltage
Termination voltage
2.375
VREF – 0.04
1.15
2.5
2.625
VREF + 0.04
1.35
V
V
V
V
V
V
VTT
VREF
VIH
VREF
1.25
Reference voltage
High-level input voltage
Low-level input voltage
High-level output voltage
VREF + 0.18
–0.3
3.0
VIL
VREF – 0.18
VOH
IOH = –8.1 mA
VTT + 0.57
(9)
VOL
Low-level output voltage
IOL = 8.1 mA (9)
VTT – 0.57
V
Table 34. SSTL-2 Class II Specifications
Symbol
Parameter
Conditions
Minimum
Typical
Maximum
Unit
VCCIO
Output supply voltage
Termination voltage
2.3
2.5
2.7
V
V
V
V
V
V
VTT
VREF
VIH
VREF – 0.04
1.15
VREF
1.25
VREF + 0.04
1.35
Reference voltage
High-level input voltage
Low-level input voltage
High-level output voltage
VREF + 0.18
–0.3
VCCIO + 0.3
VREF – 0.18
VIL
VOH
IOH = –16.4 mA
VTT + 0.76
(9)
VOL
Low-level output voltage
IOL = 16.4 mA (9)
VTT – 0.76
V
Altera Corporation
71
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