Typical Design Performance
Table 4–49. EP1AGX20 Column Pins Input Timing Parameters (Part 3 of 3)
Fast Corner
-6 Speed
Grade
I/O Standard
Clock
Parameter
Units
Industrial
1.256
Commercial
1.256
tSU
tH
tSU
tH
tSU
tH
tSU
tH
2.903
-2.626
6.009
-5.732
2.489
-2.212
5.564
-5.287
ns
ns
ns
ns
ns
ns
ns
ns
GCLK
-1.151
2.698
-1.151
2.698
3.3-V PCI-X
GCLK PLL
GCLK
-2.593
1.106
-2.593
1.106
-1.001
2.530
-1.001
2.530
LVDS
GCLK PLL
-2.425
-2.425
Table 4–50 describes I/O timing specifications.
Table 4–50. EP1AGX20 Row Pins output Timing Parameters (Part 1 of 3)
Fast Model
I/O
Standard
Drive
Strength
-6 Speed
Grade
Clock
Parameter
Units
Industrial Commercial
3.3-V
LVTTL
4 mA
8 mA
12 mA
4 mA
8 mA
4 mA
8 mA
12 mA
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
tCO
2.904
1.485
2.776
1.357
2.720
1.301
2.776
1.357
2.670
1.251
2.759
1.340
2.656
1.237
2.637
1.218
2.904
1.485
2.776
1.357
2.720
1.301
2.776
1.357
2.670
1.251
2.759
1.340
2.656
1.237
2.637
1.218
6.699
3.627
6.059
2.987
6.022
2.950
6.059
2.987
5.753
2.681
6.033
2.961
5.775
2.703
5.661
2.589
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
GCLK
GCLK PLL
GCLK
3.3-V
LVTTL
GCLK PLL
GCLK
3.3-V
LVTTL
GCLK PLL
GCLK
3.3-V
LVCMOS
GCLK PLL
GCLK
3.3-V
LVCMOS
GCLK PLL
GCLK
2.5 V
2.5 V
2.5 V
GCLK PLL
GCLK
GCLK PLL
GCLK
GCLK PLL
4–46
Altera Corporation
May 2008
Arria GX Device Handbook, Volume 1