FLEX 10K Embedded Programmable Logic Family Data Sheet
To better reflect actual designs, the power model (and the constant K in
the power calculation equations) for continuous interconnect FLEX
devices assumes that logic cells drive FastTrack Interconnect channels. In
contrast, the power model of segmented FPGAs assumes that all logic
cells drive only one short interconnect segment. This assumption may
lead to inaccurate results, compared to measured power consumption for
an actual design in a segmented interconnect FPGA.
Figure 32 shows the relationship between the current and operating
frequency of FLEX 10K devices.
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Altera Corporation