Board Components
to select the clock for ADC B. Table 10 explains how to select these three
clock signals. The selected clock will pass through a differential LVPECL
buffer before arriving at the clock input to both A/D converters
Table 10. A/D Clock Source Settings
J3, J4 Setting
Clock Source
Signal Name
Pins 1 and 2
Stratix II PLL circuitry
adc_PLLCLK1,
adc_PLLCLK2
Pins 3 and 4
Pins 5 and 6
OSC or External input
clock positive
adc_CLK_IN1,
adc_CLK_IN2
OSC or External input
clock negative
adc_CLK_IN1_n,
adc_CLK_IN2_n
Table 11 lists reference information for the A/D converters.
Table 11. A/D Converter Reference
Item
Description
Board reference
Part number
U1, U2
AD9433BSQ
Device description
Voltage
12-bit, 125-MSPS A/D converter
3.3-V digital VDD, 5.0-V analog VDD
Analog Devices
Manufacturer
Manufacturer web site
www.analog.com
Altera Corporation
21
Preliminary
ALTERA [ ALTERA CORPORATION ]
