9–18
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
1
You can still use this method if the master and slave devices use the same .sof.
Figure 9–5. Multi-Device AS Configuration where the Devices Receive the Same Data with Multiple SRAM Object Files
Slave Device of the Cyclone III Device Family
V
(1)
V
(1)
V
(1)
V
(2)
CCIO
CCIO
CCIO
CCIO
nSTATUS
CONF_DONE
nCONFIG
nCE
10 kΩ
10 kΩ
10 kΩ
10 kΩ
nCEO
N.C. (3)
DATA[0]
DCLK
MSEL[3..0]
(4)
Master Device of the
Cyclone III Device
Family
Serial Configuration
Slave Device of the Cyclone III Device Family
Device
nSTATUS
nSTATUS
CONF_DONE
nCONFIG
nCE
CONF_DONE
nCONFIG
nCE
nCEO
nCEO
N.C. (3)
GND
25 Ω (6)
(6),(8)
DATA
DATA[0]
DATA[0]
DCLK
50 Ω
DCLK
nCS
ASDI
DCLK
nCSO (5)
ASDO (5)
MSEL[3..0]
(4)
MSEL[3..0]
(4)
Slave Device of the Cyclone III Device Family
nSTATUS
CONF_DONE
nCONFIG
nCE
nCEO
N.C. (3)
(8)
50 Ω
Buffers (7)
DATA[0]
DCLK
MSEL[3..0]
(4)
Notes to Figure 9–5:
(1) Connect the pull-up resistors to the VCCIO supply of the bank in which the pin resides.
(2) Connect the pull-up resistor to the VCCIO supply voltage of the I/O bank in which the nCEpin resides.
(3) The nCEOpin is left unconnected or used as a user I/O pin when it does not feed the nCEpin of another device.
(4) The MSEL pin settings vary for different configuration voltage standards and POR time. You must set the master device in AS mode and the slave
devices in PS mode. To connect MSEL[3..0]for the master device in AS mode and the slave devices in PS mode, refer to Table 9–7 on page 9–11.
Connect the MSEL pins directly to VCCA or GND.
(5) These are dual-purpose I/O pins. The nCSOpin functions as the FLASH_NCEpin in AP mode. The ASDOpin functions as the DATA[1]pin in other
AP and FPP modes.
(6) Connect the series resistor at the near end of the serial configuration device.
(7) Connect the repeater buffers between the master and slave devices for DATA[0]and DCLK. All I/O inputs must maintain a maximum AC voltage
of 4.1 V. The output resistance of the repeater buffers must fit the maximum overshoot equation outlined in “Configuration and JTAG Pin I/O
Requirements” on page 9–7.
(8) The 50- series resistors are optional if the 3.3-V configuration voltage standard is applied. For optimal signal integrity, connect these 50- series
resistors if the 2.5- or 3.0-V configuration voltage standard is applied.
Cyclone III Device Handbook
Volume 1
August 2012 Altera Corporation