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DPCLK0 参数 Datasheet PDF下载

DPCLK0图片预览
型号: DPCLK0
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7302 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family  
9–15  
Configuration Features  
captures all its configuration data from the bitstream, it drives the nCEOpin low,  
enabling the next device in the chain. You can leave the nCEOpin of the last device  
unconnected or use it as a user I/O pin after configuration if the last device in the  
chain is a Cyclone III device family. The nCONFIG  
,
nSTATUS  
,
CONF_DONE  
,
DCLK, and  
DATA[0]pins of each device in the chain are connected (Figure 9–4).  
Figure 9–4. Multi-device AS Configuration  
V
(1)  
V
(1)  
V
(1)  
CCIO  
CCIO  
CCIO  
V
(2)  
CCIO  
10 kΩ  
10 kΩ  
10 kΩ  
10 kΩ  
Serial Configuration  
Master Device of the  
Cyclone III Device Family  
Device  
Slave Device of the Cyclone III Device Family  
nSTATUS  
CONF_DONE  
nCONFIG  
nCE  
nSTATUS  
CONF_DONE  
nCONFIG  
nCE  
nCEO  
N.C. (3)  
nCEO  
GND  
25 Ω (6)  
(6), (8)  
DATA  
DATA[0]  
DATA[0]  
DCLK  
50 Ω  
DCLK  
DCLK  
nCS  
ASDI  
nCSO (5)  
ASDO (5)  
MSEL[3..0]  
(4)  
MSEL[3..0]  
(4)  
(8)  
50 Ω  
Buffers (7)  
Notes to Figure 9–4:  
(1) Connect the pull-up resistors to the VCCIO supply of the bank in which the pin resides.  
(2) Connect the pull-up resistor to the VCCIO supply voltage of the I/O bank in which the nCEpin resides.  
(3) You can leave the nCEOpin unconnected or use it as a user I/O pin when it does not feed the nCEpin of another device.  
(4) The MSEL pin settings vary for different configuration voltage standards and POR time. You must set the master device of the Cyclone III device  
family in AS mode and the slave devices in PS mode. To connect MSEL[3..0]for the master device in AS mode and slave devices in PS mode,  
refer to Table 9–7 on page 9–11. Connect the MSEL pins directly to VCCA or GND.  
(5) These are dual-purpose I/O pins. The nCSOpin functions as the FLASH_NCEpin in AP mode. The ASDOpin functions as the DATA[1]pin in other  
AP and FPP modes.  
(6) Connect the series resistor at the near end of the serial configuration device.  
(7) Connect the repeater buffers between the master and slave devices of the Cyclone III device family for DATA[0]and DCLK. All I/O inputs must  
maintain a maximum AC voltage of 4.1 V. The output resistance of the repeater buffers must fit the maximum overshoot equation outlined in  
“Configuration and JTAG Pin I/O Requirements” on page 9–7.  
(8) The 50-series resistors are optional if the 3.3-V configuration voltage standard is applied. For optimal signal integrity, connect these 50-series  
resistors if the 2.5- or 3.0-V configuration voltage standard is applied.  
The first Cyclone III device family in the chain is the configuration master and  
controls the configuration of the entire chain. You must connect its MSEL pins to  
select the AS configuration scheme. The remaining Cyclone III device family is  
configuration slaves and you must connect their MSEL pins to select the PS  
configuration scheme. Any other Altera device that supports PS configuration can  
also be part of the chain as a configuration slave.  
August 2012 Altera Corporation  
Cyclone III Device Handbook  
Volume 1  
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