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CLK3_1N 参数 Datasheet PDF下载

CLK3_1N图片预览
型号: CLK3_1N
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7302 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family  
9–85  
Remote System Upgrade  
1
To ensure the successful reconfiguration between the pages, assert RU_nCONFIGsignal  
for a minimum of 250 ns. This is equivalent to strobing the reconfiginput of the  
ALTREMOTE_UPDATE megafunction high for a minimum of 250 ns.  
If there is an error or reconfiguration trigger condition, the remote system upgrade  
state machine directs the system to load a factory or application configuration (based  
on mode and error condition) by setting the control register accordingly.  
Table 9–30 lists the contents of the control register after such an event occurs for all  
possible error or trigger conditions.  
The remote system upgrade status register is updated by the dedicated error  
monitoring circuitry after an error condition but before the factory configuration is  
loaded.  
Table 9–30. Control Register Contents After an Error or Reconfiguration Trigger Condition  
Reconfiguration  
Error/Trigger  
Control Register Setting In  
Remote Update  
nCONFIGreset  
nSTATUSerror  
All bits are 0  
All bits are 0  
Update register  
All bits are 0  
All bits are 0  
CORE triggered reconfiguration  
CRC error  
Wd time out  
User Watchdog Timer  
The user watchdog timer prevents a faulty application configuration from stalling the  
device indefinitely. The system uses the timer to detect functional errors after an  
application configuration is successfully loaded into the Cyclone III device family.  
The user watchdog timer is a counter that counts down from the initial value loaded  
into the remote system upgrade control register by the factory configuration. The  
counter is 29-bits wide and has a maximum count value of 229. When specifying the  
user watchdog timer value, specify only the most significant 12 bits. Remote system  
upgrade circuitry appends 17’b1000 to form the 29 bits value for the watchdog timer.  
The granularity of the timer setting is 217 cycles. The cycle time is based on the  
frequency of the 10-MHz internal oscillator.  
Table 9–31 lists the operating range of the 10-MHz internal oscillator.  
Table 9–31. 10-MHz Internal Oscillator Specifications  
Minimum  
Typical  
Maximum  
Unit  
5
6.5  
10  
MHz  
The user watchdog timer begins counting after the application configuration enters  
device user mode. This timer must be periodically reloaded or reset by the application  
configuration before the timer expires by asserting RU_nRSTIMER. If the application  
configuration does not reload the user watchdog timer before the count expires, a  
time-out signal is generated by the remote system upgrade dedicated circuitry. The  
time-out signal tells the remote system upgrade circuitry to set the user watchdog  
timer status bit (Wd) in the remote system upgrade status register and reconfigures the  
device by loading the factory configuration.  
August 2012 Altera Corporation  
Cyclone III Device Handbook  
Volume 1  
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